Lightelligence Debuts First Photonic Computing Deployment, PACE 3 Chip

Lightelligence has showcased the initial real-world deployment of photonic computing technology. This was demonstrated at the WAIC conference with the Tianshu Light Cube access control system. The company also announced its PACE 3 chip, which features a 256x256 photonic matrix, specifically designed for low-latency inference operations.

Credits: Cloudinary

According to Pandaily, the WAIC conference served as a key point for optical computing's move towards commercial applications, led by Lightelligence. The Tianshu Light Cube system was presented as the first practical photonic computing system deployed in an access control setting. Furthermore, the PACE 3 chip was formally introduced, featuring a 256x256 photonic matrix tailored for low-latency inference tasks. This represents a tangible step in moving optical processing from research to market deployment.

Dr. Shen Yichen, the founder of Lightelligence, views this current phase as laying the groundwork for future applications, drawing parallels to NVIDIA's early GPU development for gaming that later supported neural networks. And Lightelligence is placing simulators in educational settings, aiming to cultivate new generations of algorithms specifically designed to run on photonic hardware. This strategy seeks to foster an ecosystem for optical computing from its foundational stages.

The core challenge of practical deployment for photonic computing revolves around integrating it with electronic systems for control and data conversion, despite its inherent bandwidth advantages, reduced transmission loss, and parallel processing capabilities that could theoretically surpass electronic chips' power and bandwidth limits. A significant hurdle has been the lack of incentive for customers to reconfigure algorithms and software for unproven hardware, alongside insufficient market demand to offset optical device manufacturing costs. Lightelligence addresses this by combining optical interconnect, optical switching, and photonic computing across its product lines, creating integrated photoelectric solutions that avoid extensive software overhauls for clients.

PACE 3 is purpose-built for large model inference, not training. It uses a photonic compute-in-memory architecture for matrix-vector multiplication, which is the dominant computational pattern in neural network inference. This design provides lower latency and greater energy efficiency compared to electronic options. Dr. Meng Huaiyu, co-founder and CTO, refers to the chip's photonic matrix size as the "sweet spot." While some in Big Tech focus on matrix size as a primary indicator, large model computations demand efficient coordination across matrices of varying dimensions, rather than reliance on a single, oversized matrix. Google's TPU has operated at 256x256 for years, and NVIDIA's Tensor Core at 64x64, supporting this principle.

The WAIC forum concentrated on initial deployment scenarios. But Lightelligence maintains that photonic computing aims to create an entirely new computing ecosystem, rather than simply improving existing GPU functions. The successful implementation in access control systems demonstrates the technology's long-term operational stability. As silicon photonics technology matures, its production costs are anticipated to follow a similar downward trajectory to traditional semiconductors, enabling broader adoption across industries.

• Lightelligence unveiled its PACE 3 photonic chip and demonstrated the Tianshu Light Cube access control system.

• The Tianshu Light Cube is presented as the first real-world deployed photonic computing system.

• The PACE 3 chip features a 256x256 photonic matrix, designed for low-latency inference in large models.

• Lightelligence aims to build a new ecosystem for optical computing, rather than just improving existing electronic solutions.

• Expected cost reductions for silicon photonics could lead to wider adoption.

Source: Pandaily